Chip Structure

  • Base Layer : P-TEOS*
  • Metal Layer : TiN / AI-0.5%Cu
  • Passivation Layer : HDP* / P-SiN (option) Polymide

*TEOS : Tetraethoxysilane
*HDP : High Density Plasma




Wafer Thickness 725±25μm 725±25μm
Wafer Size 8 inch 8 inch
Chip Size 5.02mm ♦ 5.02mm ♦
Bump pitch 150μm 150μm
Function Daisy Chain Daisy Chain
Pad config Area Area
Electrode Ball Mounted Solder Bump Cu Pillar
Pad Size 100μm ♦ 100μm ♦
Passivation opening φ40μm • φ40μm •
Polyimide opening φ60μm • φ60μm •
UBM Size φ80μm • φ75μm •
Bump Size φ85μm • φ75μm •
Bump height any any
Scribe width 100μm 100μm
Number of Pad 784 pads/chip (28×28)784 pads/chip (28×28)
Number of Chip 832 chips/wafer 832 chips/wafer
    • Top Side ♦ Bottom Side

IPC Validation Services

New Product

.4mm Pitch eWLP Dummy Wafer-Amkor
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Practical Components’ Publishes New 2017 Product Catalog
This catalog marks a major revision to the Practical Components catalog. Inside you will find over 20 pages of new products and for the first time much of it is printed ... [read more]

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