Chip Structure

  • Base Layer : P-TEOS*
  • Metal Layer : TiN / AI-0.5%Cu
  • Passivation Layer : HDP* / P-SiN (option) Polymide

*TEOS : Tetraethoxysilane
*HDP : High Density Plasma



Specifications Si   Glass  
Wafer Thickness 725±25μm 725±25μm 700±70μm 700±70μm
Wafer Size 8 inch 8 inch 8 inch 8 inch
Chip Size 10.0mm ♦ 10.0mm ♦ 10.0mm ♦ 10.0mm ♦
Bump pitch 150μm 150μm 150μm 150μm
Function Daisy Chain Daisy Chain x x
Pad config Area Area Area Area
Electrode Ball Mounted Solder Bump Cu Pillar Ball Mounted Solder Bump Cu Pillar
Pad Size 100μm ♦ 100μm ♦ x x
Passivation opening φ40μm • φ40μm • x x
Polyimide opening φ60μm • φ60μm • x x
UBM Size φ80μm • φ75μm • φ80μm • φ75μm •
Bump Size φ85μm • φ75μm • φ85μm • φ75μm •
Scribe width 100μm 100μm x x
Number of Pad 3721pads/chip(61×61) 3721pads/chip(61×61) x x
Number of Chip 208 chips/wafer 208 chips/wafer 208 chips/wafer 208 chips/wafer
  • Top Side ♦ Bottom Side

IPC Validation Services

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Practical Components’ Publishes New 2017 Product Catalog
This catalog marks a major revision to the Practical Components catalog. Inside you will find over 20 pages of new products and for the first time much of it is printed ... [read more]

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